#!/bin/sh
#
if [ $# -lt 7 ]; then
    echo "usage: vhd24mp2 design vl_style con_file  family max2_style runvl runmax runvsm"
    exit 0
fi

: ${ALT_HOME?}

proj=$1
vl_style=$2

if [ $3 = "no_constraint" ]; then
    con_file=null
else
    con_file=$3
fi 

family=$4
style=$5
runvl=$6
runmax=$7
runvsm=$8



#check the max2 directory
if [ ! -d max2 ]; then
    mkdir max2
fi

if [ ! -d max2/sim ]; then
    mkdir max2/sim
fi


# runvl
if [ $runvl = "Y" ] || [ $runvl = "y" ]; then
   echo "Info: Running Viewlogic to Max+plusII interface"
   
   # run vhdldes
   if [ $con_file = null ]; then
      vhdldes $proj.vhd -technology=altera -$vl_style
   else
      vhdldes $proj.vhd -technology=altera -$vl_style -timing=$con_file
   fi

   #check if $proj exist
   if [ ! -s wir/$proj.1 ]; then
      echo "Error: Failed to access $proj.1"
      exit 10
   fi

   #remove old EDIF netlist file
   if [ -s max2/$proj.edf ]; then
     rm -f max2/$proj.edf
   fi

   edifneto -F $proj max2/$proj.edf -l altera -l std

   if [ ! -s max2/$proj.edf ]; then
      echo "Error: failed to create EDIF file $proj.edf"
      exit 20
   fi
fi

#check if design.ini exist
if [ -s max2/$proj.ini -a -w max2/$proj.ini ]; then
    if [ -w max2/alt_tmp.ini ]; then
        echo "Error: Can not create intermediate file alt_tmp.ini"
        exit 30
    fi

    awk -f $ALT_HOME/viewlogic/bin/chkini.awk design=$proj max2/$proj.ini

    rc=$?

    if [ $rc -eq 40 ]; then
        awk -f $ALT_HOME/viewlogic/bin/chngini.awk style=$style d_family=$family design=$proj add=add_style max2/$proj.ini > max2/alt_tmp.ini
        rm -f max2/$proj.ini
        mv max2/alt_tmp.ini max2/$proj.ini
    elif [ $rc -eq 50 ]; then
        echo "Corrupted $proj.ini file.  Start Max+plusII interactively to correct it"
        exit 60
    else
        awk -f $ALT_HOME/viewlogic/bin/chngini.awk style=$style d_family=$family design=$proj max2/$proj.ini > max2/alt_tmp.ini
        rm -f max2/$proj.ini
        mv max2/alt_tmp.ini max2/$proj.ini
    fi
#check if design.acf exist
elif [ -s max2/$proj.acf -a -w max2/$proj.acf ]; then
    setacf -fmax2/$proj.acf -sGLOBAL_PROJECT_SYNTHESIS_ASSIGNMENT_OPTIONS DEVICE_FAMILY "$family  {viewlogic}"
    setacf -fmax2/$proj.acf -sGLOBAL_PROJECT_SYNTHESIS_ASSIGNMENT_OPTIONS STYLE "$style     {viewlogic}"
    setacf -fmax2/$proj.acf -sCOMPILER_INTERFACES_CONFIGURATION EDIF_OUTPUT_VERSION "200         {viewlogic}"
    setacf -fmax2/$proj.acf -sCOMPILER_INTERFACES_CONFIGURATION EDIF_INPUT_LMF1 "vwl_bas.lmf     {viewlogic}"
    setacf -fmax2/$proj.acf -sCOMPILER_INTERFACES_CONFIGURATION EDIF_INPUT_USE_LMF1 "ON          {viewlogic}"
    setacf -fmax2/$proj.acf -sCOMPILER_INTERFACES_CONFIGURATION EDIF_OUTPUT_USE_EDC "ON          {viewlogic}"
    setacf -fmax2/$proj.acf -sCOMPILER_INTERFACES_CONFIGURATION EDIF_OUTPUT_EDC_FILE "vwl.edc    {viewlogic}"
    setacf -fmax2/$proj.acf -sCOMPILER_INTERFACES_CONFIGURATION EDIF_INPUT_VCC       "VDD        {viewlogic}"
    setacf -fmax2/$proj.acf -sCOMPILER_INTERFACES_CONFIGURATION EDIF_OUTPUT_VCC      "VDD        {viewlogic}"
    setacf -fmax2/$proj.acf -sCOMPILER_INTERFACES_CONFIGURATION EDIF_NETLIST_WRITER  "ON         {viewlogic}"
    setacf -fmax2/$proj.acf -sCOMPILER_INTERFACES_CONFIGURATION EDIF_OUTPUT_MAP_ILLEGAL_CHAR "ON          {viewlogic}"
    setacf -fmax2/$proj.acf -sCOMPILER_INTERFACES_CONFIGURATION EDIF_INPUT_GND       "GND        {viewlogic}"
    setacf -fmax2/$proj.acf -sCOMPILER_INTERFACES_CONFIGURATION EDIF_OUTPUT_GND      "GND        {viewlogic}"
    setacf -fmax2/$proj.acf -sCOMPILER_INTERFACES_CONFIGURATION VHDL_NETLIST_WRITER  "ON          {viewlogic}"
#create proj.acf
else
    echo "Info: Can not find $proj.acf, creating ..."
    cat << ACFEND > max2/$proj.acf
GLOBAL_PROJECT_SYNTHESIS_ASSIGNMENT_OPTIONS
BEGIN
        DEVICE_FAMILY = FLEX8000        {viewlogic};
        STYLE = NORMAL                  {viewlogic};
END;
 
COMPILER_INTERFACES_CONFIGURATION
BEGIN
        EDIF_OUTPUT_VERSION = 200       {viewlogic};
        EDIF_INPUT_LMF1 = vwl_bas.lmf   {viewlogic};
        EDIF_INPUT_USE_LMF1 = ON        {viewlogic};
        EDIF_OUTPUT_USE_EDC = ON        {viewlogic};
        EDIF_OUTPUT_EDC_FILE = vwl.edc  {viewlogic};
        EDIF_INPUT_VCC = VDD            {viewlogic};
        EDIF_OUTPUT_VCC = VDD           {viewlogic};
        EDIF_NETLIST_WRITER = ON        {viewlogic};
        EDIF_OUTPUT_MAP_ILLEGAL_CHAR = ON        {viewlogic};
        EDIF_OUTPUT_MAP_ILLEGAL_CHAR = ON        {viewlogic};
        VHDL_NETLIST_WRITER = ON        {viewlogic};
        EDIF_INPUT_GND = GND            {viewlogic};
        EDIF_OUTPUT_GND = GND           {viewlogic};
END;
ACFEND
     setacf -fmax2/$proj.acf -sGLOBAL_PROJECT_SYNTHESIS_ASSIGNMENT_OPTIONS DEVICE_FAMILY "$family {viewlogic}"
     setacf -fmax2/$proj.acf -sGLOBAL_PROJECT_SYNTHESIS_ASSIGNMENT_OPTIONS STYLE "$style {viewlogic}"

fi

#run Max+plus II
cd max2

#remove old EDIF output, watch for multiple .edo's
if [ $runmax = "Y" ] || [ $runmax = "y" ]; then
   if [ -w $proj.edo ]; then
       rm -f $proj.edo
   fi
   if [ -w ${proj}_t.edo ]; then
	rm -f *.edo
   fi

   echo "Info: Running Max+plusII .."
   maxplus2 -c $proj
fi


#Take edo and generate vsm file
if [ $runvsm = "Y" ] || [ $runvsm = "y" ]; then
   echo "Info: Running Max+plusII to Viewlogic interface"

   #check for edo file
   if [ ! -r $proj.edo ] && [ ! -r ${proj}_t.edo ]; then
      echo "Error: Can not access $proj.edo in max2 directory"
      exit 200
   fi

   cd sim

   #check old vsm
   if [ -w $proj.vsm ]; then
       rm -f $proj.vsm
   fi
   if [ -w ${proj}_t.vsm ]; then
       rm -f ${proj}_t.vsm
   fi

   #run edifneti-- on multiple files if necessary
   if [ -r ../${proj}_t.edo ]; then
	for edifout in ../*.edo
	do
	    if [ $edifout != ../${proj}_t.edo ]
 	    then
		edifneti $edifout -a $ALT_HOME/viewlogic/alt_edif.cfg

		#generate symbol to be referenced in top edo
		wirout=`echo "$edifout" | sed -e s?../?? -e s?.edo??` 
		viewgen $wirout -makesym -noschem
	    fi
	done

   	edifneti ../${proj}_t.edo -a $ALT_HOME/viewlogic/alt_edif.cfg	
	vsm ${proj}_t
	echo "Info: Processed multiple partitions: top level design is ${proj}_t"
   else
	edifneti ../$proj.edo -a $ALT_HOME/viewlogic/alt_edif.cfg
	vsm $proj
   fi

   if [ ! -r $proj.vsm ] && [ ! -r ${proj}_t.vsm ]; then
      echo "Error: Failed to create Viewsim netlist $proj.vsm in max2/sim directory"
      exit 220
   fi
fi

echo "Info: Completed with no errors: Max+plusII report file $proj.rpt is located in max2 directory"
